skills.rest
Mr-Fang-VLSI
Mr-Fang-VLSICOMMUNITY
Explore all skills by this author →
GitHub

gt3-backside-route-policy

Enforce GT3 backside routing policy for CTS/PDN layer usage and backside-net checks.

8|3|Updated Mar 6, 2026
Search Tags:#routing#policy#innovus#gt3#backside#cts#pdn
One-click install
npx skills add https://github.com/Mr-Fang-VLSI/EDAgent --skill gt3-backside-route-policy
Or copy as Structured Prompt for Agent▼
Please help me install this Agent Skill.
Skill: gt3-backside-route-policy
Source: https://github.com/Mr-Fang-VLSI/EDAgent/tree/main/skills/gt3-backside-route-policy
Command: npx skills add https://github.com/Mr-Fang-VLSI/EDAgent --skill gt3-backside-route-policy

SYSTEM DOCUMENTATION & REQUIREMENTS

💡 This Skill includes references (resource) components.

What problem does it solve?

GT3 backside route policy standardizes CTS/PDN layer usage and backside routing, helping teams avoid CTS/PDN misrouting and backside-net violations.

Core Features & Use Cases

  • Policy defaults ensure CTS remains on M4/M5, PDN on high layers, and BPR reserved for PDN, with backside routing allowed on BM1/BM2.
  • Submit controlled runs with a guided script and monitor outputs to verify CTS/PDN placement and backside occupancy.
  • Post-run checks validate backside occupancy, BPR exclusion, and CTS layer window, with quick-reference checks in policy docs.

Quick Start

Configure your Innovus flow to apply the GT3 backside routing policy and run the consistency check using the provided guidance.

Frequently Asked Questions about gt3-backside-route-policy

High-intent search queries and answers about installing and using this skill.

FAQPage Schema
How do I enforce GT3 backside routing policy in Innovus?▼

Enforce the GT3 backside routing policy in Innovus by applying policy defaults that restrict CTS to M4/M5, reserve BPR for PDN, and allow backside routing on BM1/BM2. Then, execute the controlled submission workflow and run post-run checks to validate backside occupancy and compliance.

Why does my Innovus GT3 run report zero backside nets?▼

Zero backside nets in Innovus GT3 runs occur when CTS/PDN layers are misconfigured or BPR constraints are incorrectly applied. Diagnosing this requires checking the backside routing policy to ensure CTS uses M4/M5 and backside layers BM1/BM2 are properly enabled for routing.

What layers should CTS and PDN use for GT3 backside routing?▼

For GT3 backside routing, CTS should remain on M4/M5, while PDN should use high layers with BPR reserved exclusively for PDN. Backside routing is allowed on BM1/BM2 layers to standardize usage and prevent misrouting.

How do I validate backside occupancy and BPR exclusion after an Innovus run?▼

Validate backside occupancy and BPR exclusion after an Innovus run by executing the post-run checks provided in the GT3 backside routing policy. These checks confirm backside layer utilization, ensure BPR is excluded from standard routing, and verify the CTS layer window.

Can I use this backside routing policy for non-GT3 Innovus experiments?▼

This policy is specifically applicable to GT3 experiments requiring CTS/PDN on M4/M5 and backside layers BM1/BM2. Using it for non-GT3 Innovus experiments is not recommended unless those experiments share the exact same layer architecture and backside routing constraints.

Related Skills

Explore More Software Engineering Skills→
cosmixcosmix
53

istio

Configure Istio resources for mTLS, traffic routing, and policy enforcement.

Community
Advanced
Mr-Fang-VLSIMr-Fang-VLSI
8

eda-stage-checkpoint-golden

Create immutable Innovus stage checkpoints with DEF, V, and SDC bundles.

Community
Advanced
tangyangchao578-arttangyangchao578-art
2

physical-design

Guide digital IC physical design from floorplanning to GDSII signoff.

Community
Advanced
Mr-Fang-VLSIMr-Fang-VLSI
8

eda-theory-veto

Evaluate EDA experiment proposals and issue GO, CONDITIONAL, or NO-GO verdicts.

Community
Advanced