physical-design

Community

Master full-chip physical design workflows.

Authortangyangchao578-art
Version1.0.0
Installs0

System Documentation

What problem does it solve?

Digital IC teams face the challenge of turning architectural intent into manufacturable layouts. This Skill provides end-to-end guidance for physical design workflows, from floorplanning to GDSII, including problem diagnosis, optimization strategies, and best practices to reduce iteration cycles and improve tapeout success.

Core Features & Use Cases

  • Floorplanning, placement, CTS, routing, and signoff readiness across process nodes.
  • PDN/DFM considerations, IR drop analysis, power integrity optimization.
  • Practical workflows and best practices for faster, more reliable tapeouts.

Quick Start

Begin with a new floorplan and progress through placement, CTS, routing, timing closure, and signoff.

Dependency Matrix

Required Modules

None required

Components

Standard package

💻 Claude Code Installation

Recommended: Let Claude install automatically. Simply copy and paste the text below to Claude Code.

Please help me install this Skill:
Name: physical-design
Download link: https://github.com/tangyangchao578-art/icer_skill_package/archive/main.zip#physical-design

Please download this .zip file, extract it, and install it in the .claude/skills/ directory.
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