Package reusable VLSI IP blocks with standardized structure and documentation.
npx skills add https://github.com/KishoreDamam/VLSI-agkit --skill ip-reuse
Please help me install this Agent Skill. Skill: ip-reuse Source: https://github.com/KishoreDamam/VLSI-agkit/tree/main/.agent/skills/ip-reuse Command: npx skills add https://github.com/KishoreDamam/VLSI-agkit --skill ip-reuse
It helps you turn a one-off RTL block into reusable IP by guiding how to structure the repository, parameterize behavior, standardize interfaces, and document the integration contract so downstream teams can adopt it quickly and safely.
Use the ip-reuse skill to review your RTL package candidate and generate a reusable IP skeleton (structure, parameter plan, interface wrappers, and documentation checklist) suitable for sharing with another project or team.
High-intent search queries and answers about installing and using this skill.
Packaging reusable VLSI IP involves transforming ad-hoc RTL into a standardized deliverable with a self-contained directory structure, robust parameterization, standard interface wrappers, and release-ready documentation to ensure safe cross-project integration.
The best way to structure a reusable RTL library component is to create a self-contained directory layout that includes separate folders for RTL, testbenches, constraints, docs, and a README to ensure downstream teams can adopt it quickly.
Parameterize VLSI IP behavior by defining width, feature, and behavior parameters alongside localparams. This approach eliminates magic numbers and makes the design portable across different integration environments and configurations.
Packaging reusable VLSI IP recommends using standard interfaces like AXI or Avalon for clean integration, or implementing explicit wrapper modules for non-standard and legacy ports to abstract the interface contract effectively.
Releasing a reusable VLSI IP block requires a spec template and a validation checklist covering testbench setup, SDC constraints inclusion, versioning, and changelog discipline to define the integration contract clearly.
You should add an AXI wrapper to a third-party VLSI IP integration contract when reviewing non-standard or legacy ports, ensuring the interface abstraction keeps the integration clean and aligns with standard system connectivity.
lucasmccombCreate structured todo Markdown files with YAML frontmatter in .claude/todos.
ParadicatAutomate RTL/IP design flow with specification generation, RTL coding, and verification planning.
babywormGenerate SVA assertions and simulation checks for AXI, AHB, and APB protocol violations.
babywormGenerate IEEE 1685-2014 IP-XACT XML descriptors from RTL module definitions.
