What problem does it solve?
Configuring multi-gigabit Ethernet MGBE controllers on custom NVIDIA Jetson Thor carrier boards requires precise coordination of UPHY lane allocations, PHY plumbing, and kernel device-tree overlay configuration, a process that is highly error-prone and requires deep expertise in Jetson BSP internals, with mistakes leading to non-booting systems or non-functional Ethernet interfaces.
Core Features & Use Cases
- Validated Kernel Overlay Generation: Creates idempotent, pre-flight validated device-tree overlay fragments to enable MGBE controllers for 25G/10G/1G QSFP connectivity, with mandatory compatible string matching to ensure the overlay is loaded by UEFI.
- Dual PHY Mode Support: Handles both external MDIO PHY configurations (with I2C addressing, reset GPIO, and MDIO child node generation) and direct SerDes-to-cage wiring, with automated HSIO pin verification to catch pinmux mismatches early.
- Workflow Integration: Coordinates with sibling Jetson BSP skills (UPHY allocation, pinmux, build, flash) to ensure end-to-end compatibility, with strict guardrails to avoid conflicting edits to ODMDATA or upstream BSP sources.
- Use Case: An engineer building a custom Jetson Thor carrier with a 25G QSFP port can use this skill, after running the UPHY allocation skill, to automatically generate the correct device-tree overlay to bring up the MGBE interface, with pre-flight validation to catch errors before flashing.
Quick Start
Use the jetson-customize-mgbe skill to generate a validated kernel device-tree overlay that enables your selected MGBE controller for 25G/10G/1G QSFP connectivity on your custom Jetson Thor carrier board, following the guided per-controller configuration prompts.
