What problem does it solve?
Custom Jetson Orin and Thor carrier boards often suffer from boot failures, controller enumeration errors, or BL31 SError reboot loops caused by incorrect UPHY (unified PHY) lane allocation. Manually configuring UPHY settings requires cross-referencing multiple official NVIDIA documents, carrier schematics, and ensuring alignment between BPMP firmware and kernel device tree configurations, which is error-prone and time-consuming for BSP engineers.
Core Features & Use Cases
- Runtime documentation discovery: Retrieves valid UPHY lane allocation options directly from official NVIDIA Adaptation Guides, Module Design Guides, and SoC Technical Reference Manuals at runtime, eliminating hard-coded, version-specific value risks.
- Atomic, safe configuration generation: Produces a single atomic ODMDATA commit with correctly formatted UPHY and per-controller tokens, plus kernel-DT overlay fragments for PCIe, MGBE Ethernet, and USB controllers, with strict guardrails to avoid invalid token formatting that would brick boot.
- Alignment and safety enforcement: Enforces mandatory user confirmation for lane selection, validates BPMP firmware vs kernel device tree state alignment, and tracks run state idempotently to avoid duplicate or conflicting changes.
- Use Case: A BSP engineer working on a custom Jetson Thor carrier board can use this skill to map UPHY lanes to 10G Ethernet, PCIe, and USB 3.0 ports per the carrier schematic, generate the correct ODMDATA and overlay changes, and avoid common post-flash failures like FMON-triggered reboot loops.
Quick Start
Use the jetson-customize-uphy skill to configure UPHY lane allocation for your custom Jetson Orin or Thor carrier board by selecting the correct uphy0-config and uphy1-config tokens from the official Adaptation Guide and confirming your carrier's routed lane assignments.
