jetson-customize-pcie

Generate kernel-DT overlay fragments to configure PCIe controllers on Jetson carrier boards.

46|7|Updated Apr 27, 2026

Search Tags:#pcie #hardware configuration #jetson #bsp customization #kernel dt overlay

Ready to run

npx skills add https://github.com/NVIDIA-AI-IOT/jetson-bsp-skills --skill jetson-customize-pcie-nvidia-ai-iot

💬 Prompt for ChatGPT / Claude Chat▼

Please help me install this Agent Skill.
Skill: jetson-customize-pcie
Source: https://github.com/NVIDIA-AI-IOT/jetson-bsp-skills/tree/main/skills/jetson-customize-pcie
Command: npx skills add https://github.com/NVIDIA-AI-IOT/jetson-bsp-skills --skill jetson-customize-pcie-nvidia-ai-iot

SYSTEM DOCUMENTATION & REQUIREMENTS

💡 This Skill includes scripts (resource) and references (resource) components.

What problem does it solve?

This Skill streamlines the process of configuring PCIe controllers on Jetson Thor or Orin custom carrier boards, reducing manual configuration and potential errors.

Core Features & Use Cases

PCIe Configuration: Enable, disable, set lanes, and adjust link speeds for PCIe controllers.
Automated Overlay Creation: Generates kernel-DT overlay fragments for custom BSP configurations.
Use Case: For engineers setting up a custom Jetson carrier board, this Skill automates the PCIe configuration process, ensuring correct settings for the desired PCIe controllers.

Quick Start

Run the 'jetson-customize-pcie' skill to configure PCIe controllers on your custom carrier board.

Frequently Asked Questions about jetson-customize-pcie

High-intent search queries and answers about installing and using this skill.

FAQPage Schema

How do I configure PCIe controllers on a Jetson Orin custom carrier board?▼

To configure PCIe controllers on a Jetson Orin custom carrier board, this Skill generates kernel-DT overlay fragments that handle controller enablement, lane width, and link speed settings automatically.

What do I need to generate a kernel DT overlay for Jetson Thor PCIe?▼

Generating a kernel DT overlay for Jetson Thor PCIe requires UPHY lane allocation data and a custom carrier configuration to correctly produce the necessary overlay fragments for your specific hardware setup.

Can I set PCIe lane width and link speeds for Jetson BSP customization?▼

Yes, you can set PCIe lane width and link speeds during Jetson BSP customization by using this Skill to define and generate the appropriate kernel-DT overlay fragments for your controllers.

What is the best way to enable PCIe on a custom Jetson carrier board?▼

The best way to enable PCIe on a custom Jetson carrier board is to automate kernel-DT overlay fragment generation, streamlining the process and reducing manual configuration errors for controller setup.

When should I use automated overlay creation for Jetson PCIe configuration?▼

You should use automated overlay creation for Jetson PCIe configuration when setting up a custom carrier board and needing accurate controller enablement without the risk of manual hardware configuration errors.