jetson-customize-pcie

To configure PCIe controllers on a Jetson Orin custom carrier board, this Skill generates kernel-DT overlay fragments that handle controller enablement, lane width, and link speed settings automatically.

Generating a kernel DT overlay for Jetson Thor PCIe requires UPHY lane allocation data and a custom carrier configuration to correctly produce the necessary overlay fragments for your specific hardware setup.

Yes, you can set PCIe lane width and link speeds during Jetson BSP customization by using this Skill to define and generate the appropriate kernel-DT overlay fragments for your controllers.

The best way to enable PCIe on a custom Jetson carrier board is to automate kernel-DT overlay fragment generation, streamlining the process and reducing manual configuration errors for controller setup.

You should use automated overlay creation for Jetson PCIe configuration when setting up a custom carrier board and needing accurate controller enablement without the risk of manual hardware configuration errors.