ref-model

What problem does it solve?

Building a reliable, bitexact software oracle for algorithm validation and early bandwidth estimation removes ambiguity between specification and RTL implementation and prevents costly late-stage fixes. The skill ensures that algorithm correctness is proven against industry reference implementations (JM/HM) before hardware development proceeds.

Core Features & Use Cases

• Bitexact functional model: Produce pure C (C11) reference models without clock/reset semantics callable from SystemVerilog via DPI-C.
• Bandwidth analysis: Track external memory accesses via ext_mem_read/ext_mem_write abstractions and generate per-block bandwidth estimates.
• Conformance and coverage: Run automated bitexact comparisons vs JM/HM, generate conformance_report.json, and verify feature coverage against iron-requirements.json.
• Use Case: When Phase 1 research completes, implement a refc/ model to validate codec blocks, run bandwidth sweeps with PARALLEL_LANES variations, and provide a verification oracle for RTL tests.

Quick Start

Build a DPI-C compatible C reference model in refc/, run its self-test, and generate conformance_report.json and bandwidth_report.json.