sim-tool-profiles

Standardize and replay hardware simulation runs across multiple toolchains.

43|9|Updated Feb 25, 2026
One-click install
npx skills add https://github.com/babyworm/rtl-agent-team --skill sim-tool-profiles
Or copy as Structured Prompt for Agent
Please help me install this Agent Skill.
Skill: sim-tool-profiles
Source: https://github.com/babyworm/rtl-agent-team/tree/main/skills/sim-tool-profiles
Command: npx skills add https://github.com/babyworm/rtl-agent-team --skill sim-tool-profiles

SYSTEM DOCUMENTATION & REQUIREMENTS

What problem does it solve?

Standardizes and replays hardware simulation runs across multiple toolchains to ensure reproducible results.

Core Features & Use Cases

  • Cross-tool simulator profiles for verilator, iverilog, vcs, xrun, and questa.
  • Wrapper scripts and templates to run regression benches with consistent outputs.
  • Use Case: Integrate with CI to regression-test HDL projects across simulators.

Quick Start

Load and apply ready-to-use simulator profiles across verilator, iverilog, vcs, xrun, and questa to achieve reproducible results.

Frequently Asked Questions about sim-tool-profiles

High-intent search queries and answers about installing and using this skill.

FAQPage Schema
How do I standardize Verilog simulation runs across multiple toolchains like verilator and questa?

To standardize Verilog simulation runs, you apply a common wrapper script and tool-specific templates that generate consistent logs, replay scripts, and pass/fail summaries across verilator, iverilog, vcs, xrun, and questa.

What is the best way to integrate hardware simulation regression tests into CI?

The best way to integrate HDL regression tests into CI is applying cross-tool simulator profiles that generate consistent outputs and replay scripts, ensuring verification workflows pass identically across different hardware simulators.

Can I use the same verification workflow for both iverilog and vcs?

Yes, you can use the same verification workflow for iverilog and vcs by applying ready-to-use simulator profiles that provide a common wrapper script to unify run commands and standardize pass/fail summaries across different toolchains.

How do I generate consistent logs and replay scripts for hardware simulations?

You generate consistent logs and replay scripts by applying tool-specific templates alongside a common wrapper script, which standardizes simulation execution and outputs across verilator, iverilog, vcs, xrun, and questa.

Does this approach support regression testing for xrun and questa?

Yes, this approach supports regression testing for xrun and questa by providing cross-tool simulator profiles that wrap run commands and produce consistent pass/fail summaries for reproducible verification workflows.