Automate the ORFS place-and-route flow for sky130hd designs with PPA reporting.
npx skills add https://github.com/xsw632/ChipAgent --skill pnr
Please help me install this Agent Skill. Skill: pnr Source: https://github.com/xsw632/ChipAgent/tree/main/skills/pnr Command: npx skills add https://github.com/xsw632/ChipAgent --skill pnr
This Skill eliminates the tedious, error-prone manual work of running physical implementation for digital designs on the sky130hd open-source PDK, automating the full ORFS place-and-route flow, report generation, and quality-of-results comparison that would otherwise require manual command execution and artifact parsing.
Use the pnr skill to run the full physical implementation flow for your compiled 8-bit ALU module and generate the GDS file along with timing, power, and area reports.
High-intent search queries and answers about installing and using this skill.
Automating place-and-route for sky130hd designs involves running the full OpenROAD-flow-scripts make flow. This process handles synthesis, PnR, and GDS export automatically without manual command intervention.
Generating PPA reports from post-synthesis Verilog is done by running an automated physical implementation flow. The process produces comprehensive timing, power, area, and DRC violation metrics directly from the input design.
Yes, you can use OpenROAD-flow-scripts for multi-round quality-of-results comparison. The automated flow supports parameter tuning with automatic retries and generates side-by-side QoR comparison tables to identify optimal configurations.
The ORFS make flow supports automatic parameter tuning for timing closure. It applies multi-round retries to test different timing and utilization constraints, helping achieve production-ready GDS files and optimal QoR.
To export a GDS file from a compiled Verilog module using sky130hd, run the automated physical implementation workflow. The flow processes the post-synthesis design and outputs a verified, production-ready GDS file.
A limitation of automating physical design with OpenROAD-flow-scripts is that it specifically targets the sky130hd process design kit. Designs must be provided as post-synthesis Verilog to successfully execute the place-and-route and PPA reporting workflow.
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