Agent Skills by lycx
Showing 20 vetted skills indexed across 1 GitHub repositories.
sram-mapping
Analyze Verilog RTL to map SRAM instances to sky130hd macros.
chipyard-local
Automate Chipyard Verilog generation and sky130hd SRAM mapping for OpenROAD.
lint
Run Verilator lint-only checks on generated Verilog for hardware modules.
initialize
Detect installed hardware development tool versions and generate environment configuration.
simulate
Automates Verilator simulation runs and structured pass/fail reporting from logs.
chipyard-docker
Generate Verilog RTL from Chipyard configs using Docker containers.
chipyard-pnr-docker-test
Replace physical SRAM macros with mock modules for Chipyard PnR in Docker.
pnr
Automate the ORFS place-and-route flow for sky130hd designs with PPA reporting.
chipyard-rtl
Generate synthesizable Verilog RTL from local Chipyard Rocket Chip configurations.
requirement-parser
Converts natural language hardware descriptions into Chime-compliant JSON specifications with validation and workspace setup.
testbench
Generates C++ Verilator; testbenches from spec.json files for hardware modules.
compile
Compiles Chisel hardware modules into synthesizable Verilog via automated sbt builds.
workflow
Generate simulation-verified Verilog from plain English hardware descriptions.
generate
Convert natural language hardware descriptions into compilable Chisel Scala source code.
chipyard-pnr
Automate backend detection and workflow routing for Chipyard place-and-route tasks.
chipyard-pnr-docker
Run Chipyard RTL-to-GDS place-and-route flows in Docker containers.
sync-back
Copy modified local ChipAgent project files back to the source repository.
chipyard-pnr-local
Automates Chipyard-to-GDSII place-and-route for sky130hd using OpenROAD Flow Scripts.
chipyard
Detect local Chipyard installations and Docker availability to route hardware workflows.
debug
Analyze failed hardware simulation logs to identify root causes.