Automates Chipyard-to-GDSII place-and-route for sky130hd using OpenROAD Flow Scripts.
npx skills add https://github.com/xsw632/ChipAgent --skill chipyard-pnr-local
Please help me install this Agent Skill. Skill: chipyard-pnr-local Source: https://github.com/xsw632/ChipAgent/tree/main/skills/chipyard-pnr-local Command: npx skills add https://github.com/xsw632/ChipAgent --skill chipyard-pnr-local
Manually running the full Chipyard RTL generation to OpenROAD Flow Scripts place-and-route flow requires handling complex edge cases including SRAM macro overrides, multi-clock constraint generation, and iterative parameter tuning to meet timing and DRC requirements, which is time-consuming and error-prone for hardware engineers.
Use the chipyard-pnr-local skill to run the full place-and-route flow for your Chipyard design with default baseline parameters to generate a production-ready GDSII layout.
High-intent search queries and answers about installing and using this skill.
Automating Chipyard place-and-route for sky130hd involves converting Chisel-generated Verilog to production-ready GDSII layouts via OpenROAD Flow Scripts, handling SRAM macro overrides, multi-clock constraints, and adaptive multi-round parameter tuning to achieve timing closure and zero DRC violations.
OpenROAD routing fails with OOM errors on sky130 SRAM macros due to missing macro overrides. Automatically generating sky130 SRAM overrides ensures correct blackbox configuration during synthesis and prevents routing memory exhaustion.
Meeting target frequency goals during ASIC physical design with OpenROAD requires adaptive multi-round PnR tuning, running 3+ rounds with AI-driven parameter adjustments to achieve timing closure while maintaining zero DRC violations.
Yes, OpenROAD Flow Scripts process Chipyard Chisel outputs by converting generated Verilog into GDSII layouts for the sky130hd PDK, automatically handling multi-clock constraint generation and SRAM blackbox configuration during the end-to-end flow.
Adaptive multi-round PnR parameter tuning is an automated process running 3+ iterations of place-and-route with AI-driven parameter adjustments to meet user-specified frequency targets while ensuring timing closure and zero DRC violations in the final GDSII layout.
xsw632Automate Chipyard Verilog generation and sky130hd SRAM mapping for OpenROAD.
tangyangchao578-artGuide digital IC physical design from floorplanning to GDSII signoff.
xsw632Run Chipyard RTL-to-GDS place-and-route flows in Docker containers.
232322336666Execute the Cadence Innovus Place & Route flow on a remote Linux server via SSH/SCP.
