sta

Community

Close timing violations with real STA insight

AuthorKishoreDamam
Version1.0.0
Installs0

System Documentation

What problem does it solve?

This Skill helps you interpret static timing analysis results and determine why WNS/WHS fail, so you can close setup/hold violations correctly instead of blindly changing RTL.

Core Features & Use Cases

  • Timing-report triage and field-to-equation mapping: explains how launch/capture arrival, skew, uncertainty, derating, CRPR credit, and SI/crosstalk delta-delay terms affect slack.
  • Violation closure playbook: provides a practical decision process for classifying path types, sanity-checking constraint integrity, selecting the least disruptive fix tier, and validating with before/after report diffs.
  • Sign-off realism: guides correct MMMC view selection (setup at slow-slow, hold at fast-fast), and choosing the right derating model (OCV vs AOCV vs POCV), including how to avoid common STA misinterpretations.

Quick Start

Ask an AI coding agent to analyze your failing STA output by walking through report_timing (full_clock_expanded), extracting the key terms (skew, uncertainty, CRPR, derate, and SI deltas), classifying the path group, and recommending the cheapest constraint-then-logic fix with a validation checklist.

Dependency Matrix

Required Modules

None required

Components

references

💻 Claude Code Installation

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Please help me install this Skill:
Name: sta
Download link: https://github.com/KishoreDamam/VLSI-agkit/archive/main.zip#sta

Please download this .zip file, extract it, and install it in the .claude/skills/ directory.
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