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static-bug-analysis

Official

Systematically identifies RTL bugs early in design.

Software Engineering#verification#code-quality#static-analysis#bug-analysis#rtl#verilog
AuthorXS-MLVP
Version1.0.0
Installs0

System Documentation

What problem does it solve?

RTL designs often harbor subtle bugs undetected by informal reviews; this skill provides a structured workflow to perform static bug analysis on DUT RTL sources.

Core Features & Use Cases

  • Step-based static analysis guided by FG/FC/CK taxonomy present in DUT_functions_and_checks.md.
  • Generates structured bug reports with code context automatically appended to DUT_static_bug_analysis.md.
  • Use Case: Verification engineer audits RTL modules under DUT RTL/, identifies potential issues like state-machine gaps, boundary conditions, timing hazards, interface protocol concerns, and records them for remediation.

Quick Start

Run the static bug analysis workflow on DUT RTL sources to identify potential bugs and append them to the DUT_static_bug_analysis.md via RunSkillScript.

Dependency Matrix

Required Modules

None required

Components

scripts

💻 Claude Code Installation

Recommended: Let Claude install automatically. Simply copy and paste the text below to Claude Code.

Please help me install this Skill:
Name: static-bug-analysis
Download link: https://github.com/XS-MLVP/UCAgent/archive/main.zip#static-bug-analysis

Please download this .zip file, extract it, and install it in the .claude/skills/ directory.
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