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vivado-analysis

Interpret Vivado timing and QoR reports to guide timing closure decisions.

156|19|Updated Mar 27, 2026
Search Tags:#design-analysis#vivado#timing-analysis#tcl#timing-closure#report-timing#qor
One-click install
npx skills add https://github.com/Shinei-Nouzen-Arch/FPGA-Agent-skills --skill vivado-analysis
Or copy as Structured Prompt for Agent▼
Please help me install this Agent Skill.
Skill: vivado-analysis
Source: https://github.com/Shinei-Nouzen-Arch/FPGA-Agent-skills/tree/main/vivado-analysis
Command: npx skills add https://github.com/Shinei-Nouzen-Arch/FPGA-Agent-skills --skill vivado-analysis

SYSTEM DOCUMENTATION & REQUIREMENTS

What problem does it solve?

Provides expert interpretation of Vivado analysis reports (timing, QoR, and congestion) to guide reliable timing closure decisions and design improvements.

Core Features & Use Cases

  • Interpret report_timing, report_timing_summary, and report_design_analysis outputs to identify worst paths, clock skew, and optimization opportunities.
  • Synthesize guidance across Vivado TCL commands, constraint edits (vivado-constraints), and implementation strategies (vivado-impl) to close timing efficiently.
  • Use-case: after routing when timing margins are tight, quickly decide whether to apply retiming, constraint adjustments, or resource/path changes.

Quick Start

Analyze the latest Vivado timing reports and apply the recommended actions to drive timing closure.

Frequently Asked Questions about vivado-analysis

High-intent search queries and answers about installing and using this skill.

FAQPage Schema
How do I interpret Vivado timing reports to fix setup violations?▼

Interpreting Vivado timing reports involves analyzing report_timing_summary to identify worst paths and clock skew, then applying constraint adjustments or implementation strategy changes to achieve timing closure.

What does report_qor_assessment show in Vivado design analysis?▼

The report_qor_assessment in Vivado provides Quality of Results metrics across synthesis and routing stages, highlighting optimization opportunities to guide timing closure and design improvements.

How do I use Vivado TCL commands to close timing after routing?▼

Use Vivado TCL commands after routing to apply targeted mitigation strategies like retiming or constraint edits, directly addressing path failures identified in report_timing and report_design_analysis outputs.

Can I analyze Vivado congestion reports to improve routing QoR?▼

Yes, analyzing Vivado congestion reports alongside report_design_analysis outputs helps identify routing bottlenecks and resource conflicts, enabling QoR-driven mitigation through implementation strategy adjustments.

What's the best way to decide between retiming and constraint adjustments for timing closure?▼

The best approach is to synthesize guidance from Vivado report_timing outputs, evaluating worst paths and clock skew to determine whether retiming, constraint edits, or resource changes provide the most efficient timing closure.

Why does my Vivado post-implementation timing still fail despite synthesis optimizations?▼

Post-implementation timing failures persist when routing congestion or clock skew introduce new delays, requiring analysis of report_design_analysis and report_timing_summary to apply targeted implementation strategy changes.

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