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hls

Convert C/C++ algorithms to synthesisable RTL with HLS directives and equivalence verification.

180|46|Updated Apr 12, 2026
Search Tags:#algorithm optimization#RTL verification#high-level synthesis#C/C++ to RTL#HLS directives
One-click install
npx skills add https://github.com/chuanseng-ng/digital-chip-design-agents --skill hls
Or copy as Structured Prompt for Agent▼
Please help me install this Agent Skill.
Skill: hls
Source: https://github.com/chuanseng-ng/digital-chip-design-agents/tree/main/plugins/hls/skills/hls
Command: npx skills add https://github.com/chuanseng-ng/digital-chip-design-agents --skill hls

SYSTEM DOCUMENTATION & REQUIREMENTS

💡 This Skill requires bambu, legup, circt-opt, vitis_hls, stratus, catapult, and includes scripts (resource) and references (resource) and assets (resource) components.

What problem does it solve?

This Skill addresses the challenges of converting C/C++ algorithms into synthesisable RTL, optimizing HLS directives, and ensuring RTL equivalence with the original C model.

Core Features & Use Cases

  • Algorithm Analysis: Identifies and resolves HLS-hostile patterns in C/C++ code.
  • Directive Planning: Implements HLS directives for latency, throughput, and area optimization.
  • Synthesis Execution: Performs HLS synthesis and verifies the generated RTL.
  • Co-Simulation Verification: Compares RTL outputs with the C golden model for accuracy.
  • Sign-off: Ensures all HLS-hostile patterns are resolved and verifies RTL equivalence.
  • Use Case: For a chip designer looking to convert a C/C++ algorithm into RTL for a high-level synthesis tool, this Skill automates the process from analysis to sign-off, reducing manual effort and potential errors.

Quick Start

Run the HLS analysis and synthesis for the provided C/C++ algorithm using the hls skill.

Frequently Asked Questions about hls

High-intent search queries and answers about installing and using this skill.

FAQPage Schema
How do I convert C/C++ algorithms to synthesizable RTL?▼

Converting C/C++ algorithms to synthesizable RTL requires high-level synthesis tools like Bambu or LegUp to translate the code, optimize HLS directives, and generate hardware designs.

What are HLS-hostile patterns and how do I fix them before synthesis?▼

HLS-hostile patterns are C/C++ coding structures that prevent effective high-level synthesis. Algorithm analysis identifies these patterns, and directive planning resolves them to optimize latency, throughput, and area.

How do I verify RTL equivalence with the original C model?▼

Verifying RTL equivalence involves running co-simulation verification to compare the generated RTL outputs against the C golden model, ensuring functional accuracy before final sign-off.

Does this high-level synthesis flow work with Bambu and LegUp?▼

Yes, the high-level synthesis flow supports Bambu HLS, LegUp HLS, vitis_hls, and other tools to execute synthesis, optimize directives, and verify the resulting hardware design.

What is the best way to optimize HLS directives for area and throughput?▼

Optimizing HLS directives requires algorithm analysis to resolve hostile patterns, followed by strategic directive planning for latency, throughput, and area optimization during synthesis execution.

Why does high-level synthesis fail on unoptimized C++ code?▼

High-level synthesis fails on unoptimized C++ code due to HLS-hostile patterns that block translation. Algorithm analysis resolves these issues, enabling successful C to RTL conversion and verification.

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