rtl-sim-debug-pcie-dummy

What problem does it solve?

DEMO/TEMPLATE domain sub-skill demonstrates how to author rtl-sim-debug-<subsystem> skills and plug into the parent rtl-sim-debug skill for PCIe RTL debugging.

Core Features & Use Cases

• Teaching template for linking a domain sub-skill to a parent rtl-sim-debug workflow, showing how domain-specific context is loaded at activation.
• PCIe RTL scope coverage including controller, PIPE PHY, link training, TLP, DLLP, and flow-control messages to illustrate integration without implementing a real debug capability.
• Extensibility guidance to flesh out the sub-skill into a productized domain skill by adding references, scripts, and assets as needed.

Quick Start

Rename this template to rtl-sim-debug-pcie-<subsystem> and flesh out its domain playbooks and references to deploy in a real debugging workflow.